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| Customization: | Available |
|---|---|
| Metal Coating: | Copper |
| Mode of Production: | SMT |
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| Item | Production Capacity |
| Layer Counts | 1-20 layers |
| Material | FR-4,Cu base,High TG FR-4,PTFE,Rogers,TEFLON etc. |
| Board thickness | 0.20mm-8.00mm |
| Maximum Size | 600mmX1200mm |
| Board Outline Tolerance | +0.10mm |
| Thickness Tolerance(t≥0.8mm) | ±8% |
| Thickness Tolerance(t<0.8mm) | ±10% |
| Insulation Layer Thickness | 0.075mm--5.00mm |
| Minimum Line | 0.075mm |
| Minimum Space | 0.075mm |
| Out Layer Copper Thickness | 18um--350um |
| Inner Layer Copper Thickness | 17um--175um |
| Drilling Hole(Mechanical) | 0.15mm--6.35mm |
| Finish Hole(Mechanical) | 0.10mm-6.30mm |
| Diameter Tolerance(Mechanical) | 0.05mm |
| Registration(Mechanical) | 0.075mm |
| Aspect Ratio | 16:1 |
| Solder Mask Type | LPI |
| SMT Mini.Solder Mask Width | 0.075mm |
| Mini. Solder Mask Clearance | 0.05mm |
| Plug Hole Diameter | 0.25mm--0.60mm |
| Impedance control Tolerance | ±10% |
| Surface finish/treatment | HASL,ENIG,Chem,Tin,Flash Gold, OSP, Gold Finger |
| Production capacity of hot-sale products | |
| Double Side/Multilayer PCB Workshop | Aluminum PCB Workshop |
| Technical Capability | Technical Capability |
| Raw materials: CEM-1, CEM-3, FR-4(High TG), Rogers, TELFON | Raw materials: Alurminum base, Copper base |
| Layer: 1 layer to 20 Layers | Layer: 1 layer and 2 Layers |
| Min.line width/space: 3mil/3mil(0.075mm/0.075mm) | Min.line width/space: 4mil/4mil(0.1mm/0.1mm) |
| Min.Hole size: 0.1mm(dirilling hole) | Min.Hole size: 12mil(0.3mm) |
| Max. Board size: 1200mm* 600mm | Max.Board size: 1200mm* 560mm(47in* 22in) |
| Finished board thickness: 0.2mm- 6.0mm | Finished board thickness: 0.3~ 5mm |
| Copper foil thickness: 18um~280um(0.5oz~8oz) | Copper foil thickness: 35um~210um(1oz~6oz) |
| NPTH Hole Tolerance: +/-0.075mm, PTH hole Tolerance: +/-0.05mm | Hole position tolerance: +/-0.05mm |
| Outline Tolerance: +/-0.13mm | Routing outline tolerance: +/ 0.15mm; punching outline tolerance:+/ 0.1mm |
| Surface finished: Lead free HASL, immersion gold(ENIG), immersion silver, OSP, gold plating, gold finger, Carbon INK. | Surface finished: Lead free HASL, immersion gold(ENIG), immersion silver, OSP etc |
| Impedance control tolerance: +/-10% | Remain thickness tolerance: +/-0.1mm |
| Production capability: 50,000 s.q.m/month | MC PCB Production capability: 10,000 s.q.m/month |
| 1 | SMT assembly including BGA assembly |
| 2 | Accepted SMD chips: 0204, BGA, QFP, QFN, TSOP |
| 3 | Component height: 0.2-25mm |
| 4 | Min packing: 0204 |
| 5 | Min distance among BGA : 0.25-2.0mm |
| 6 | Min BGA size: 0.1-0.63mm |
| 7 | Min QFP space: 0.35mm |
| 8 | Min assembly size: (X*Y): 50*30mm |
| 9 | Max assembly size: (X*Y): 350*550mm |
| 10 | Pick-placement precision: ±0.01mm |
| 11 | Placement capability: 0805, 0603, 0402 |
| 12 | High pin count press fit available |
| 13 | SMT capacity per day: 80,000 points |
| Lines | 9(5 Yamaha,4KME) |
| Capacity | 52 million placements per month |
| Max Board Size | 457*356mm.(18"X14") |
| Min Component size | 0201-54 sq.mm.(0.084 sq.inch),long connector,CSP,BGA,QFP |
| Speed | 0.15 sec/chip,0.7 sec/QFP |
| Lines | 2 |
| Max board width | 400 mm |
| Type | Dual wave |
| Pbs status | Lead-free line support |
| Max temp | 399 degree C |
| Spray flux | add-on |
| Pre-heat | 3 |
| Category | Quickest Lead Time | Normal Lead Time |
| Double sideds | 24hrs | 120hrs |
| 4 Layers | 48hrs | 172hrs |
| 6 Layers | 72hrs | 192hrs |
| 8 Layers | 96hrs | 212hrs |
| 10 Layers | 120hrs | 268hrs |
| 12 Layers | 120hrs | 280hrs |
| 14 Layers | 144hrs | 292hrs |
| 16-20 Layers | Depends on the specific requirements | |
| Above 20 Layers | Depends on the specific requirements | |
| AOI Testing | Checks for solder paste Checks for components down to 0201 Checks for missing components, offset, incorrect parts, polarity |
| X-Ray Inspection | X-Ray provides high-resolution inspection of: BGAs/Micro BGAs/Chip scale packages /Bare boards |
| In-Circuit Testing | In-Circuit Testing is commonly used in conjunction with AOI minimizing functional defects caused by component problems. |
| Power-up Test |
Advanced Function Test
Flash Device Programming
Functional testing
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